Tenstorrent's Posts (144)

2025-07-19

Chiplet Emulation Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will help build emulation infrastructure for a System-in-package for high-performance AI/ML engines. This role requires a strong technical background and a problem-solver mindset. This role ishybrid, based out of Tokyo, Japan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Nice to Have: Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency,asylee and refugeeinformation and supporting documentation will be required and considered as a condition of employment. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Help build a state-of-the-art hardware emulation ecosystem including,Build flow for emulation models with optimum frequency and emulation footprintWrite emulation test-benches for single and multi chiplet models and transactors, monitors and harness componentsWrite test plans focusing on unique functional coverage, performance, power extraction and low level software developmentExecute test plans, summarize the results and share feedback with project stakeholders - Build flow for emulation models with optimum frequency and emulation footprint - Write emulation test-benches for single and multi chiplet models and transactors, monitors and harness components - Write test plans focusing on unique functional coverage, performance, power extraction and low level software development - Execute test plans, summarize the results and share feedback with project stakeholders - Develop synthetic components for custom transactors, monitors, checkers, etc… - Work across boundaries with architects, software and design/verification teams to define and improve the emulation platform - Build flow for emulation models with optimum frequency and emulation footprint - Write emulation test-benches for single and multi chiplet models and transactors, monitors and harness components - Write test plans focusing on unique functional coverage, performance, power extraction and low level software development - Execute test plans, summarize the results and share feedback with project stakeholders - Advanced degree in electrical engineering, computer engineering, or computer science - Proven experience in emulation/design, with a strong track record of successful projects - Proficiency with Synopsys Zebu and/or Cadence Palladium, with the ability to adapt to various emulation platforms as needed - Understanding of logic design and mapping design to emulation hardware - Knowledge in Verilog/system Verilog - Knowledge of emulation tools, flows, scripting and automation - Good problem solving skills, organizational and communication skills - Good English language skills (written and spoken) - Experience with Cadence Palladium - Knowledge of C, C++ or SystemC - Knowledge of RISC-V, CPU microarchitecture, machine learning, die-to-die, memory controllers, PCIe, UCIe - Understanding of verification - Fluency in Japanese - Japanese work visa

Location: Japan

Salary range: None - None

2025-07-19

Chiplet Physical Design Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will be responsible for synthesis and place and route using industry standard tools for high-speed CPU core design. Knowledge of cutting edge silicon technology 5nm and lower and multi Ghz design is a plus. This role isbased out of Tokyo, Japan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency,asylee and refugeeinformation and supporting documentation will be required and considered as a condition of employment. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Synthesis and Place and Route using industry standard tools for high speed CPU core design - Plan out resources, schedule, project PPA - Develop strategies to deliver reproducible design convergence results - Help to create and refine synthesis and PNR flow for the project team - Perform all aspects of design flow from logic synthesis, place and route, FEV, power, timing, quality checks and design closure - Develop and recommend better design methodologies to enable better timing convergence - Plan out resources, schedule, project PPA - Guide and mentor junior engineers - PV convergence (including static timing and power analysis) - Chip physical design verification including formal equivalence, timing, electrical rules, DRC/LVS, Noise and electro-migration checks - Scripting in an interpreted language, minimum TCL in addition to at least one other - Advanced degree in electrical, computer engineering or computer science - Experience with integrated circuit design tools (e.g. Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure - Experience with PV convergence, including static timing and power analysis - Experience with chip physical design verification, including formal equivalence, timing, electrical rules, DRC/LVS, noise and electro-mitigation checks - Hands-on experience with synthesis, block and chip level implementation with industry standard PnR flows and tools - Strong experience in SoC/ASIC/GPU/CPU design flows on taped out designs - Expertise in timing closure and block/chip levels and ECO flows - Experience with scripting in an interpreted language (Python, TCL) - Willingness to work with others in a highly complex decision space - Skills at developing an implementation plan, monitoring key indicators and communicating resource needs, as well as scoping risk to deliver value on schedule - Excellent verbal and written communication in English, and collaboration skills - Fluency in Japanese. - Japanese work visa.

Location: Japan

Salary range: None - None

2025-07-19

Power Design Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. This is a CPU tech-leadership role focused on driving power analysis and projections for the development of CPUSS with an emphasis on power analysis. The role involves defining CPU rail planning and PMIC inductor sizing while collaborating closely with SoC and Board teams. Responsibilities include optimizing the system PDN for CPU rails, and managing the power vector plan for comprehensive coverage of the CPUSS. The position requires driving power analysis on RTL and Netlist using tools like Joules and PTPX, working with RTL design, synthesis, and physical design teams to measure and optimize power, and evaluating new power optimization techniques at various design stages. Additionally, the role involves tabulating metrics results for analysis comparison and working with post-silicon teams to correlate projections with silicon power measurements. This role isRemote, based out of North America. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Drive Power analysis and Projections on a project involved in the development of CPUSS with emphasis in power analysis. - Responsible for Power vector plan and definition for comprehensive coverage of the CPUSS. - Drive power analysis on RTL and Netlist using tools like Joules and PTPX. - Work closely with RTL design, Synthesis, and physical design teams to measure and optimize power. - Evaluate and propose new power optimization techniques at RTL, Synthesis and Physical Design Stages. - Tabulate metrics results for analysis comparison. - Work with post-Silicon teams to correlate projections with silicon power measurements. - Scripting in an interpreted language, minimum TCL in addition to at least one other - Extensive experience in Power analysis and optimization required. - 10+ years of ASIC design, or related work experience. - Experience with low power implementation techniques in RTL, Synthesis or Physical design stages. - Proficiency in scripting language, such as: Tcl, Python. - Strong analytical and problem-solving skills. - Outstanding written and verbal communication skills. - Low power intent concepts and languages (UPF or CPF). - Good understanding of Verilog/System Verilog. - Experience with CPU micro-architecture and their power challenges. - Experience in Thermal analysis.

Location: United States

Salary range: None - None

2025-07-19

RTL Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will develop and customize chiplets, including but not limited to chiplet die-to-die interconnect. This role is on-site, based out of Tokyo, Japan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency,asylee and refugeeinformation and supporting documentation will be required and considered as a condition of employment. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Work on front-end RTL integration of CPU cores, AI cores, interface IPs and high-speed I/Os - Write specifications, micro-architecture, create RTL implementation plan, implement the plan based on the micro-architecture specification - Work closely with verification, emulation and physical design teams to transform RTL to GDSII - Work on post-silicon validation activities - Contribute to design methodologies driving continuous improvement for front-end design - Advanced degree in electrical, computer engineering or computer science - At least 5 years industry experience in logic design - Knowledge of CPU architecture, SoC architecture - Experience with CPU/SoC RTL implementation with Verilog/SystemVerilog - Experience with high-speed I/O controllers & PHY integration, such as PCI-express, DDR, HBM or UCIe… - Proficiency in RTL design and front-end tools and simulators (VCS/IUS), CDC/Lint checkers - Proficiency in physical design tools like synthesis (DC), static timing checks (STA), DFT - Good problem solving skills, organizational and communication skills - Good English language skills (written and spoken)

Location: Japan

Salary range: None - None

2025-07-19

Verification Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will ensure functionality and performance of the system. This role ishybrid, based out of Tokyo, Japan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Nice to Have: Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency,asylee and refugeeinformation and supporting documentation will be required and considered as a condition of employment. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Verify Tenstorrent’s digital IP and SoC logic at chiplet integration level, using predominantly an UVM based verification methodology, - Build and improve components of verification infrastructure including model builds and simulation/regression runs, - Create verification components like testbenches, checkers and test generators, - Add assertions and coverages along associated methodologies, - Build verification test plans for subsystems, align them with project stakeholders, implement test suites, summarize the results and share feedback with project stakeholders - Publish and review verification metrics and drive convergence towards tape-out, - Work across boundaries with architects, software and design/emulation teams, - Guide and mentor junior engineers. - Advanced degree in electrical, computer engineering or computer science - Proven experience in CPU or SoC verification - Experience with verification flows, scripting and automation - Good knowledge of logic design - Knowledge of Verilog//v2k/system Verilog - Strong problem solving skills - Excellent organizational and communication skills - Good English language skills (written and spoken) - Knowledge of RISC-V, machine learning, die-to-die, memory controllers, PCIe, UCIe - Knowledge of low level drivers and firmware in C - Fluency in Japanese - Japanese work visa

Location: Japan

Salary range: None - None

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