Tenstorrent's Posts (144)

Sr. Staff, Physical Design Engineer - Chiplets

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We're building fast silicon and integrating it into a chiplet-based system — and we need people who can help close that loop. This isn’t just a PnR role — it’s about owning the last mile between great architecture and real silicon. If you know physical design or want to level up fast in it, and care about making hard things work, we’ve got room at the table. This role is hybrid based out of Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are What We Need What You Will Learn Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Deeply curious about how high-performance silicon gets built and delivered. - Comfortable in the weeds — timing reports, power grids, clock trees, layout blocks. - Interested in how chiplets change physical design, integration, and packaging. - A builder who sees constraints as part of the fun, not a reason to back off. - An engineer to help bring high-speed CPU cores from RTL to physical silicon. - Someone comfortable working across synthesis, place & route, timing, and signoff to ensure clean chiplet integration. - A strong collaborator who can align physical implementation with architectural and verification intent. - A practical problem-solver who improves slow parts of the flow, automates what’s repetitive, and catches issues early. - How chiplet architecture reshapes the rules of physical design and timing. - What it takes to build a system where the silicon, packaging, and performance all align. - Why real closure isn’t about tools — it’s about understanding the system. - How a tightly integrated team moves fast across disciplines and tapeouts.

Location: United States

Salary range: None - None

Staff, Software Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will develop software for our RISC-V CPU chiplet. This role ison-site, based out of Tokyo, Japan. Responsibilities: Experience & Qualifications: Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency,asylee and refugeeinformation and supporting documentation will be required and considered as a condition of employment. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Design, develop, and optimize system software for RISC-V-based systems. - Collaborate with cross-functional teams to define software requirements and specifications. - Participate in development and maintenance of software stacks, including Operating Systems, drivers, firmware, and libraries, to support our hardware platforms. - Implement and optimize system software, and contribute to workload optimization. - Troubleshoot and resolve software and system-level issues. - Develop and maintain software development processes, tools, and methodologies to ensure high-quality code and timely delivery. - Stay up-to-date and engaged with the latest industry trends and advancements in RISC-V, AI, and ML technologies. - Regular communication/travel to Australia and USA to meet with the team. - Fluent in English - Bachelor's degree or higher in Computer Science, Computer Engineering, Electrical Engineering, or a related field, or equivalent work experience. - Strong debugging, problem-solving, and analytical skills. - Excellent communication and teamwork abilities. - Proven experience in delivering complex system software products to customers and internal stakeholders. - 5+ years of professional experience in system software engineering. - Solid understanding of RISC-V architecture and instruction set. - Experience with Linux kernel development and device driver programming. - Experience with product development of embedded software and real-time solutions is a plus. - Strong coding skills in C/C++/ASM and one or more of Python, Rust or Go.

Location: Japan

Salary range: None - None

STA Lead, Physical Design Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will be responsible for STA timing analysis using industry standard tools for high-speed CPU core design. Knowledge of cutting edge silicon technology 5nm and lower and multi Ghz design is a plus. This role isRemote, based out of North America. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Full chip timing analysis from early investigation to final implementation and tape out. - Propose or develop timing methodologies to support the timing flow from RTL synthesis to implementation and timing closure. - Work with architects and logic designers to generate block and full chip timing constraints. - Analyze scenarios and margin strategies with Synthesis & Design team. - Partner with physical design teams to close and sign off the designs through PnR and ECO cycles. - PhD, Masters or Bachelors Degree in EE, EECS or CS. - Hands-on experience in ASIC timing constraints generation and timing closure. - Expertise and advanced knowledge of industry standard timing EDA tools (Prime Time, StarRC etc.). - Deep understanding and experience in timing closure of various functional and test modes - Expertise in deep-sub micron processes (Crosstalk delay, noise glitch, POCV, IR-STA). - Proficient in scripting (TCL, Perl, Python, csh/bash). - Problem solver, Efficient written and verbal communication, Excellent organization skills and Mentorship quality. - Self starter and highly motivated. - Ability to work cross-functionally with various teams and be productive under aggressive schedules.

Location: United States

Salary range: None - None

CPU Program Manager

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. The CPU Program Manager will be responsible for driving the end to end development of our next generation RISC-V CPUs starting from Architecture to RTL design, Design Verification, DFT, Physical Design all the way through to tape out and debug. This role requires strong expertise in silicon development along with strong program management skills to successfully drive these complex projects to completion. This role isHybrid, based out of Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Define and establish program goals, objectives, and deliverables for our next Gen CPU IP - Collaborate with internal stakeholders, including hardware architects, design teams, software engineers, and product managers, to gather requirements and align on architectural specifications for our CPU IP. - Oversee the IP during the design process, ensuring compliance with industry standards, performance targets, power efficiency, and project timelines. - Manage and track program progress, identifying risks, issues, and dependencies specific to CPU development, and implement effective mitigation strategies. - Communicate program status, updates, and challenges to senior management and stakeholders - Foster a collaborative and productive work environment, promoting effective communication, teamwork, and knowledge sharing. - Conduct regular program reviews, evaluating performance, identifying areas for improvement, and implementing corrective actions. - Stay abreast of industry trends, emerging technologies, and advancements in CPU server architectures, machine learning accelerators, and related fields to drive innovation and maintain competitive advantage. - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. - 10+ years of proven experience in chip architecture design, specifically focused on CPU server - Strong understanding of CPU architectures, microarchitecture design, and performance optimization techniques. - Familiarity with industry standards, such as x86, ARM and RISC-V - Demonstrated experience in leading cross-functional teams and driving collaboration among hardware, software, and algorithm teams. - Proficiency in JIRA, Confluence and other tools and program management resources. - Strong problem-solving and decision-making abilities, particularly in addressing challenges specific to CPU server and machine learning chip development. - Ability to adapt to changing priorities and thrive in a fast-paced, dynamic environment.

Location: United States

Salary range: None - None

Emulation Engineer, Chiplets

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Design and development of emulation infrastructure for system in packages (SiPs) for high-performance AI/ML engines. This role requires a high degree of ownership, a strong technical background and a problem-solver mindset. By enabling and optimizing our emulation strategy, you will be ensuring the success of internal and external customers, and making a significant impact on bringing Tenstorrent's products to market. This role isHybrid based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Develop DV and  hardware emulation ecosystem - Build flow for single and multi-chiplet DV environment and emulation platforms with best frequency, emulation foodprint combination - Create test benches for single/multi chiplet models with transactors, monitors,and harnesses - Own and develop test plans focusing on unique functional coverage, performance, power extraction and low level software development - Maximize debuggability and automation of the build and run flows. - Create multi-user environment for  optimal usage and resource sharing - Develop custom transactors, monitors, checkers etc. - Create a support system to maximize engineering efficiency of emulation customers - Cross-functional work with Architects, Software and Design/Verification/Emulation teams to define and improve emulation platform - Guide and mentor junior engineers - BS/MS/PhD in EE/ECE/CE/CS with at least 10 years of industry experience working with  ASICs or SoC teams - Expert understanding of logic design, verification and mapping design to emulation hardware - Expert knowledge of commercial emulators like ZeBu, Palladium, Veloce - Expertise in verilog/systemVerilog/C++/systemC - Expertise in DV and emulation tools and flows, scripting and automation - Strong problem solving skills - Excellent organizational and communication skills, oral and written. - Experience with Synopsys Zebu - Knowledge of prototyping with HAPS or Xilinx/Altera FPGAs - Knowledge of C/C++/systemC - Knowledge of hardware/architectures relating to one or more of  RISC-V, ML, fabric, die-2-die, memory controllers, PCIe, UCIe - Understanding of sister workflows like virtual prototyping, and power analysis

Location: United States

Salary range: None - None

1 ... 5 6 7 8 ... 29