Tenstorrent's Posts (144)

CPU Program Manager

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. The CPU Program Manager will be responsible for driving the end to end development of our next generation RISC-V CPUs starting from Architecture to RTL design, Design Verification, DFT, Physical Design all the way through to tape out and debug. This role requires strong expertise in silicon development along with strong program management skills to successfully drive these complex projects to completion. This role isHybrid, based out of Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Define and establish program goals, objectives, and deliverables for our next Gen CPU IP - Collaborate with internal stakeholders, including hardware architects, design teams, software engineers, and product managers, to gather requirements and align on architectural specifications for our CPU IP. - Oversee the IP during the design process, ensuring compliance with industry standards, performance targets, power efficiency, and project timelines. - Manage and track program progress, identifying risks, issues, and dependencies specific to CPU development, and implement effective mitigation strategies. - Communicate program status, updates, and challenges to senior management and stakeholders - Foster a collaborative and productive work environment, promoting effective communication, teamwork, and knowledge sharing. - Conduct regular program reviews, evaluating performance, identifying areas for improvement, and implementing corrective actions. - Stay abreast of industry trends, emerging technologies, and advancements in CPU server architectures, machine learning accelerators, and related fields to drive innovation and maintain competitive advantage. - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. - 10+ years of proven experience in chip architecture design, specifically focused on CPU server - Strong understanding of CPU architectures, microarchitecture design, and performance optimization techniques. - Familiarity with industry standards, such as x86, ARM and RISC-V - Demonstrated experience in leading cross-functional teams and driving collaboration among hardware, software, and algorithm teams. - Proficiency in JIRA, Confluence and other tools and program management resources. - Strong problem-solving and decision-making abilities, particularly in addressing challenges specific to CPU server and machine learning chip development. - Ability to adapt to changing priorities and thrive in a fast-paced, dynamic environment.

Location: United States

Salary range: None - None

CPU Workload Performance Analysis Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly-skilled CPU Workload Performance Analysis Engineer to drive workload characterization, performance simulation, and in-depth performance analysis for cutting-edge CPU products. In this role, you will collaborate closely with CPU architects, RTL designers, and software engineers to reduce real-world applications for performance modeling, analyze workload characteristics, identify and resolve performance bottlenecks, and optimize performance-per-watt efficiency. Your work will directly influence the design and implementation of next-generation high-performance computing platforms across diverse workloads. This role is open to Santa Clara, CA, Austin, TX, Boston, MA, Toronto, ON, Ottawa, ON, or open to Remote in North America We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Conduct competitive analysis of the latest CPU products using industry-standard benchmarks and emerging applications. - Characterize CPU workloads, identifying performance bottlenecks and power inefficiencies in hardware and software interactions. - Collaborate with CPU architects and RTL designers to enhance microarchitectural features and improve performance/watt metrics. - Reduce workloads for CPU performance modeling, FPGA emulation, and model-to-RTL correlation. - Utilize performance models, EDA frameworks, and profiling tools to measure, characterize, and predict CPU performance and power under various workloads. - Stay up to date with industry trends, new workload requirements, and advancements in CPU microarchitecture and performance analysis techniques. - Ph.D. in Computer Engineering, Electrical Engineering, or a related field. - Strong research background or industry expertise in benchmark construction, workload characterization, workload reduction, and performance simulation. - Proficiency in performance profiling tools such as Linux Perf, Strace, AMD’s uProf, Arm’s Telemetry Solution, or similar tools. - Deep understanding of CPU microarchitecture concepts, including superscalar pipelines, speculative execution, SIMD, and memory hierarchy. - Strong knowledge of operating system internals, runtimes, compilers, and GNU libraries. - Proficiency in C/C++, intrinsic/assembly programming, and scripting languages such as Python and Shell. - Excellent problem-solving and communication skills and the ability to work across multidisciplinary teams. - Experience with Ansible automation and GitLab CI is a plus. - Experience with GCC or LLVM compiler optimization is a plus - Familiarity with HPC and cloud virtualization is a plus.

Location: United States

Salary range: None - None

Package Design EngineerNew

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. In this role, you will have the opportunity to engage in all stages of a package design from architecture to feasibility studies to production. At the architectural stage, you will work with cross-functional teams to convey limitations and collect requirements. You will learn about the architectural aspects of our products very early. At the feasibility stage, you will work on fast iterations of different design concepts and will interact with stakeholders from silicon to system engineering.  This is an opportunity to learn about all aspects of product design and market placement. At the production stage, you will work with design services and OSATs to drive the production design and DFM. This allows you to learn about manufacturing and production requirements. This role ishybrid, based out of Taipei, Taiwan, Toronto, Canada or Austin, Texas. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Drive routing feasibility studies on organic substrate and 2.5D interposers - Evaluate silicon floorplan and IP bump map proposals and provide feedback - Work with cross-functional teams and collect input to define package ball-out map - Work closely with Power and Signal Integrity engineers to come up with optimized solutions - Design daisy chain packages for testing and qualification - Work with external design services to convert feasibility studies to production design and DFM - Minimum 5 years of experience as a package layout engineer (focusing on flip chip BGA packages) and "some" of the items below - Proficient in Cadence Allegro - Routing high-speed signals (GDDR, LPDDR, SERDES) - Die-to-die protocols (BoW, UCIe, …) - Design for high-power chips (300+ W) - MCM and/or chiplet-based modules - Advanced 2.5D and 3D packages (RDL/interposer) is an asset - Familiar with packaging technology and manufacturing processes - Ability to collaborate effectively with cross-functional teams - Ability to provide design options based on incomplete or ambiguous data - Ability to spin design quickly, automate the process, script, and do change control

Location: Austin, Texas, United States; Toronto, Ontario, Canada; 泰安, New Taipei City, Taiwan

Salary range: None - None

Power Integrity EngineerNew

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a Power-Integrity (PI) Engineer in the Packaging team, you will work with other packaging team members and cross-functional teams to drive PI architecture and design and optimize package design to meet PI requirements for both external and internal IP. You will initiate and drive feasibility studies, product design, and future technology evaluation to enable Tenstorrent’s chiplet-based products. This role ishybrid, based out of Austin, Texas, Toronto, Canada, or Santa Clara, California. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Contribute to establishing and evolving best-known methods for PI analysis - Provide architectural input at package and product levels - Initiate and drive feasibility studies to ensure a solid product definition - Work with cross-functional teams to create PI specifications for internal IPs - Enable PI co-design by collaborating with cross-functional teams, from Silicon Architecture to System Integration - Initiate and drive new, cross-functional technology developments to improve PI performance. - Perform DC and AC analysis to optimize working designs (Sigrity suite experience preferred). - Project layer count, packaging technology, and capacitor count impacts on emerging products. - Experience with taping out die-to-die IPs. - Perform system-level transient simulations in spice and perform Vmin and ripple analysis. - Mentor junior team members. - A minimum of 5 years of experience in PI analysis of high-power electronics - Strong fundamental understanding of SIPI concepts - Familiarity with ANSYS and/or Cadence tools - Experience in VR/IVR modelling and design is a plus - Experience in pre-layout modelling and analysis is a plus - Experience with GDDR is a plus - PI measurement and test experience is a plus - Ability to deal with ambiguity and changing requirements and to come up with creative solutions - Strong cross-functional communication and collaboration - Ability to initiate PI investigations and drive cross-functional developments - Willing and excited to learn and broaden experience

Location: Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada

Salary range: None - None

Principal Reliability Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for an experienced Reliability Engineer to drive and execute reliability testing for our products from wafer to board level. As a Principal Reliability Engineer, you will be expected to design and execute innovative and systematic plans to assess and improve our product's reliability, field performance, and robustness. You are expected to work with cross-functional teamsto include design-for-reliability concepts intheearly phases of the design and evaluate product reliability for different market segments. This role ishybrid, based out of Toronto, Austin, Santa Clara, Ft Collins or Boston We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Design statistical reliability models for existing and future products for reliability predictions and improvements - Define mission profile and expected lifetime/failure rate for different market segments - Design and execute reliability and accelerated life testing to identify trends, failure rates, and lifetime - Implement design-for-reliability in the early stages of design for future products - Ensure product adherence to semiconductor and extended industry standards - Apply reliability expertise to aid in root-causing systematic and random field failures - 10+ years of experience in reliability engineering in the semiconductor industry - Expertise in silicon/package/PCBA accelerated life modelling and testing - Familiar with reliability test suites from wafer to package to product level - Experienced in modelling lifetime, building mission profiles, and planning for accelerated life testing - Experienced in the automotive industry is an asset

Location: Toronto, Ontario, Canada

Salary range: None - None

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