Tenstorrent's Posts (144)

2024-07-09

Performance Modelling Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. You will be part of a dynamic AI architecture team in India that spearheads architectural innovation to challenge and advance the industry norms for AI processors, SoCs, and systems at scale. We are seeking engineers for prototyping ideas, analyze performance, energy and cost trade-offs across hardware/software options. You should have a firm grasp of deep learning workloads, especially the large generative LLM/Diffusion models. This role ison-site, based out of Bangaluru, India. Responsibilities: Experience & Qualifications: Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency,asylee and refugeeinformation and supporting documentation will be required and considered as a condition of employment. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Lead the development of innovative performance models for AI Systems. - Collaborate with cross-functional teams to drive architectural innovations from model insights to implementation. - Maintain an expert-level awareness of technological advancements and performance modelling practices. - Explore HW/SW Optimizations at Component, SoC, Network (Scale-Up/Scale-Out) and System Levels - Master’s/Phd in CS/EE, or a related field, with a solid foundation in Computer Architecture. - At least 7 years of experience in performance modelling, simulation, or system architecture, with a passion for AI technologies. - A strong foundation in AI/Deep-Learning fundamentals to complement your expertise in computer architecture. - Proficient programmer in Python/C/C++. - Experience in building simulators/models in SystemC or similar frameworks at different abstraction levels. - Exceptional problem-solving, analytical, and innovation-driven skills. - Effective communication skills and adeptness at collaborative teamwork.

Location: Bengaluru, Karnataka, India

Salary range: None - None

2024-07-09

AI Hardware Design Verification Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced Senior-Level Design Verification Engineer to join our dynamic and innovative team. As a Senior-Level Design Verification Engineer, you will play a critical role in ensuring the quality and reliability of our digital designs through comprehensive verification methodologies. The successful candidate will have a strong background in verification techniques, excellent problem-solving skills, and a passion for delivering high-quality designs. This job is hybrid, based out of Austin, TX; Santa Clara, CA; Boston, MA; or Toronto, ON. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Develop and execute comprehensive verification strategies to validate complex digital designs, ensuring compliance with specifications and standards. - Collaborate closely with design teams to understand design requirements and contribute to the creation of verification plans and testbenches. - Write and execute test cases to verify functionality, performance, and power aspects of the design. - Perform functional and formal verification to identify and debug design issues and ensure correct design behavior. - Develop and maintain verification infrastructure, methodologies, and best practices to improve efficiency and productivity. - Drive the adoption of advanced verification methodologies, tools, and techniques to enhance the overall verification process. - Mentor and provide technical guidance to junior verification engineers, sharing expertise and best practices. - Collaborate with cross-functional teams to analyze and resolve system-level issues and ensure seamless integration of the design. - Stay updated with the latest industry trends, emerging technologies, and verification methodologies to drive innovation and continuous improvement. - Bachelor's or Master's degree in Electrical/Computer Engineering or a related field. - Proven experience as a Design Verification Engineer, with a focus on complex digital designs. - Strong knowledge of digital design concepts, including RTL, synthesis, and timing constraints. - Proficiency in verification methodologies such as UVM (Universal Verification Methodology) and SystemVerilog. - Experience in developing and executing verification plans, testbenches, and test cases for digital designs. - Solid understanding of functional coverage, assertion-based verification, and code coverage analysis. - Proficiency in scripting and programming languages like Python, Perl, or C/C++. - Familiarity with industry-standard EDA tools and simulation environments. - Excellent problem-solving and debugging skills, with a keen eye for detail. - Strong communication and interpersonal skills, with the ability to collaborate effectively in a team-oriented environment. - Proven ability to work under tight deadlines and deliver high-quality results.

Location: United States

Salary range: None - None

2024-07-09

Staff, Digital Design Verification Engineer, Chiplets

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a Staff Digital DV Engineer to join our team. At Tenstorrent you will accelerate your career building the AI and Software 2.0 compute platform of the future. You will work on challenging engineering problems within our dedicated team. We are looking for a talented DV candidate with great communication skills to help build our products and improve our processes. This role is hybrid, based out of Toronto, Ottawa, Boston, or North Carolina. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Verification of Tenstorrent's digital IP and SOC logic, using advanced verification methodologies - UVM, C/C++/Python, FPGA prototyping, emulation - Execution and creation of test plans - Writing testbenches, checkers and tests, models, assertions and initiators - Creating functional coverage points - Reviewing verification results and metrics while helping the team towards tape-out - Performance and power verification and validation of Tenstorrent's IP and SOC - Bachelor/Master in Electrical/Computer Engineering/Engineering Science - 5-8 years experience in block-level verification - Strong hardware verification language experience (SystemVerilog, SystemC) - Knowledge of UVM and coverage driven constrained random verification - Excellent programming skills – particularly C, C++, Python.  (Also Ruby, Perl, Tcl, YAML, Make, Bash) - Deep interest in computer architecture, picking up new methodologies and tools, as well as the application of machine learning to make chip-design and verification more efficient

Location: Toronto, Ontario, Canada

Salary range: None - None

2024-07-09

Principal RTL Design Engineer, Network-on-chip (NoC)

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a highly skilled and experienced Principal RTL Design Engineer to join our team, focusing on Network-on-Chip (NoC) design. In this role, you will play a critical part in architecting and implementing high-performance, scalable NoC solutions that are integral to the efficiency of our AI processors. You will collaborate closely with cross-functional teams to ensure our NoC designs meet the stringent performance, power, and area requirements of our cutting-edge products. This role is hybrid, based out of Belgrade, Serbia or Toronto, Ontario. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Take ownership of key components within our Network-on-Chip (NoC), driving their design and development. - Define and architect NoC specifications and micro-architectures in collaboration with system architects and other design engineers. - Optimize NoC designs for performance, power, and area, ensuring efficient data movement and low latency. - Develop and maintain RTL code in Verilog/SystemVerilog, ensuring high coding standards and best practices. - Conduct thorough design verification and validation, including simulation, emulation, and formal verification. - Collaborate with physical design teams to ensure successful integration and implementation of NoC components. - Drive design reviews and provide technical guidance and mentorship to junior engineers. - Work closely with software and hardware teams to define and implement system-level features and enhancements. - Contribute to the development of design methodologies and flows to improve efficiency and quality. - Degree in Electrical Engineering, Computer Engineering, or a related field. - 10+ years of experience in RTL design, with a strong focus on Network-on-Chip (NoC) architectures. - Proven expertise in Verilog/SystemVerilog and RTL design principles. - Deep understanding of NoC design, including routing algorithms, flow control, arbitration, and topology. - Experience with performance analysis and optimization of NoC systems. - Familiarity with design verification methodologies and tools (SystemVerilog Assertions, UVM, C-DPI, etc.). - Experience with synthesis, timing analysis, and physical design considerations. - Strong problem-solving skills and the ability to work independently and as part of a team. - Excellent communication and interpersonal skills, with a track record of leading and mentoring engineering teams. - Experience with high-performance computing or AI/ML accelerator architectures - preferred. - Experience and/or understanding of low-level firmware written in C/C++ - preferred. - Experience with system-level modeling and simulation tools - preferred. - Familiarity with high-level synthesis (HLS) tools and methodologies - preferred.

Location: Toronto, Ontario, Canada

Salary range: None - None

2024-07-09

Principal, Design Verification Engineer, Fabric and Memory Subsystem

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Experienced engineer focused on Fabric / Memory Subsystem verification for high-performance CPUs. The person coming into this role will work on a server class Fabric unit. This role is hybrid, based out of Austin, TX, Santa Clara, CA, Boston, MA or Toronto, Ontario. Responsibilities: Experience and qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Functional and performance verification of the Fabric unit for a from-scratch high performance CPU while working closely with Architecture and RTL team - Develop detailed block level verification plans for a high-performance Fabric - Design and develop reusable block level testbench components in SV, UVM and C++, that include microarchitectural models, monitors, checkers - Develop random and directed stimulus that spans pre-silicon, emulation and post-silicon domain - Evaluate and integrate open-source toolchains into the DV flow - Develop DV environment, tools and infrastructure to enable functional verification for pre-silicon, emulation and post-silicon - Work with design, test and post silicon validation teams to ensure high quality delivery of the Fabric / Mem Subsystem block - BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of experienceStrong background and experience with high performance OOO CPU microarchitecture especially with load/store, caches and memory subsystem - Experience working on a Fabric for a CPU or GPU based system.  Knowledge of industry standard protocols such as CHI, AXI, ACE, Tilelink, CMN - Architectural understanding of memory ordering, cache coherency protocols, memory consistency, multi-processors and fabric topologies - Significant experience debugging RTL and DV in a simulation environment - Verification methodologies and techniques – Simulation/debug, TB development, stimulus, checking, coverage, infrastructure, tools - Experience with C++ / SV / UVM as well as scripting languages - Experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator) - Strong problem solving and debug skills across various levels of design hierarchies

Location: Austin, Texas, United States

Salary range: None - None

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