Tenstorrent's Posts (144)

2024-07-09

CAD Engineer - Design Verification Infrastructure

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Design and development of scalable DevOps infrastructure for high performance chiplets going into industry leading AI/ML architecture. The successful candidate will be responsible for administration and automation of many aspects of the Front-End compute environment. The person coming into this role will help define methodology and create tools and flows that will enable a multidisciplinary and multi-site team to execute flawlessly. This role isHybrid, based out of Toronto, Ottawa, Boston or North Carolina. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Administration and automation of workflows associated with servers, batch compute infrastructure and licensing tools - Linux administration for design team’s compute infrastructure - Development and maintenance of containers used across the design team - VM hosting and management for critical design team services - Maintain and enhance the Git infrastructure to support CI/CD, nightly regressions across multiple development platforms - Build software tools and scripts for design flow automation - Engage with leading industry vendors and 3rd party IP providers, driving integration of external tools and IPs in the design flow - Experience with open-source tool-flows and deployment of applicable tools and infrastructure in the design flow; drive tool decisions for build vs leverage vs buy - BS/MS/PhD in EE/ECE/CE/CS with minimum 3 years of industry experience - Experience with HPC compute - Experience with development of DV tools and infrastructure and large-scale regression environments is required, extensive debug of automation workflows - Experience working with build tools such as Bazel - Knowledge of EDA tools, strong understanding of simulators. Hands-on experience working with emulation environment and tools is a plus - Expertise developing tools for revision control, prior experience with git preferred - Very strong programming skills in C/C++, scripting skills in Python, Tcl, Perl - Familiarity with relational databases (e.g MySql, MariaDB) and visualization tools (e.g.Kibana)

Location: Boston, Massachusetts, United States

Salary range: None - None

2024-07-09

Staff Engineer, Shared Cache Design Verification

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Experienced engineer focused on L2/Shared Cache verification for high-performance CPUs. The person coming into this role will work on a server class L2/Shared Cache unit This role ishybrid, based out of Santa Clara, CA or Austin, TX. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Functional and performance verification of the L2/Shared Cache unit for a from-scratch high performance CPU while working closely with Architecture and RTL team - Develop detailed block level verification plans for L2/Shared Cache that includes both architectural (RISCV ISA) and microarchitectural functionality - Design and develop reusable block level testbench components in SV, UVM and C++, that include microarchitectural models, monitors, checkers - Develop random and directed stimulus that spans pre-silicon, emulation and post-silicon domain - Evaluate and integrate open-source toolchains into the DV flow - Develop DV environment, tools and infrastructure to enable functional verification for pre-silicon, emulation and post-silicon - Work with design, test and post silicon validation teams to ensure high quality delivery of the L2/Shared Cache block - BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of experience - Strong background and experience with high performance OOO CPU microarchitecture especially with load/store, caches and memory subsystem - Experience working on an x86, ARM or RISCV based CPU - Architectural understanding of address translation, memory ordering, cache coherence protocols, memory consistency, multi-processors and fabric topologies - Significant experience debugging RTL and DV in a simulation environment - Verification methodologies and techniques – Simulation/debug, TB development, stimulus, checking, coverage, infrastructure, tools - Experience with C++ / SV / UVM as well as scripting languages - Experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator) - Strong problem solving and debug skills across various levels of design hierarchies

Location: United States

Salary range: None - None

2024-07-09

Staff Engineer, Post Silicon Validation

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. In this role, you will be responsible for the post-silicon execution and debugging of our advanced AI hardware. You will develop tools, software, and scripts for post-silicon verification, and work closely with our customers to replicate and troubleshoot issues. You will also work with design and architecture teams to develop debug features. This role requires a strong background in software and firmware, along with experience in emulation and RTL. This role ishybrid, based out of Austin, TX or Santa Clara, CA. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Execute post-silicon validation tasks, including debugging using tools and techniques like JTAG, on-chip logic, trace, and scan. - Define and develop post silicon validation infrastructure for content development and execution. - Develop and maintain collateral for post-silicon verification, including tools, software, and scripts. - Utilize emulation for firmware and post silicon content verification before deployment. - Define, design and implement debug features. Provide debug feature requirements with insights from post silicon validation experience. - Collaborate closely with hardware engineers and design teams to ensure alignment of software and hardware design. - Provide customer-facing support. This includes root causing customer issues by triaging, replicating fails in-house and providing software or hardware solutions as needed. - Stay updated with the latest advancements in post-silicon validation  and debugging techniques. - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. - 5+ years of experience in post-silicon validation and debugging. - Proficiency with debugging tools and techniques, including JTAG, on-chip logic, trace, and scan. - Strong software and firmware development skills. - Experience with hardware emulation and understanding its limitations. - Familiarity with RTL design and the ability to convert post-silicon features to pre-silicon design information. - Strong problem-solving skills and attention to detail. - Excellent communication skills and experience in customer-facing roles. - Ability to work effectively in a small, collaborative team environment. - Experience with CPU or AI hardware and machine learning frameworks. (preferred) - Knowledge of CPU, GPU or FPGA programming. (preferred) - Understanding of parallel computing and distributed systems.  (preferred) - Experience with version control systems such as Git. (preferred) - Experience with RTOS. (preferred)

Location: United States

Salary range: None - None

2024-07-09

Staff Engineer, CPU Unit Verification

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. CPU Unit Verification Engineer will focus on the Unit/Block level verification for high-performance CPUs. The person coming into this role will help execute the verification strategy and the DV plan. This role is hybrid, based out of Austin, TX or Santa Clara, CA. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Execute functional and performance verification at the unit testbench level for a from-scratch high performance CPU while working closely with Architecture and RTL team. - Develop detailed unit level verification plans for load store that includes both architectural (RISCV ISA) and microarchitectural functionality. - Design and develop reusable unit level testbench components in SV, UVM and C++, that include microarchitectural models, monitors, checkers. - Develop random and directed stimulus that spans pre-silicon, emulation and post-silicon domain. - Evaluate and integrate open-source toolchains into the DV flow. - Develop DV environment, tools and infrastructure to enable functional verification for pre-silicon, emulation and post-silicon. - Work with design, test and post silicon validation teams to ensure high quality delivery of RTL. - BS/MS/PhD in EE/ECE/CE/CS with at least 4 years of experience - Strong experience with testbench development in SV/UVM as well as scripting languages - Background and experience with high performance OOO CPU microarchitecture - Experience working on an x86, ARM or RISCV based CPU. - Significant experience debugging RTL and DV in a simulation environment. - Verification methodologies and techniques – Simulation/debug, TB development, stimulus, checking, coverage, infrastructure, tools - Experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator) - Strong problem solving and debug skills across various levels of design hierarchies.

Location: Santa Clara, California, United States

Salary range: None - None

2024-07-09

Staff Engineer, CPU Formal Verification

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. CPU Formal Verification engineer will be responsible for applying various formal verification techniques to source bugs in specifications and RTL implementation for a high performance data center class CPU. This role ishybrid, based out of Austin, TX or Santa Clara, CA. Responsibilities: Experience & Qualifications: Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded. - Drive formal verification for block across CPU design by interacting with the team and scoping out the complexity of the problem at hand - Develop detailed verification plans to highlight the checks and constraints - Develop assertions, cover properties and connectivity checks as a part of formal verification flows and debug any failures in regressions - Create formal verification flows and deploy techniques that leverage on both industry standard and open-source tools. Drive automation of formal testbenches and ensure they are a part of regressions - Deploy scripts and automation to support formal, review setups and proofs with Microarchitecture and DV engineers - BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of experience - Prior experience with formal verification methods and techniques - Strong knowledge of computer architecture with some experience on CPU, GPU, Cache designs - Hands-on experience with formal verification tools such as Jasper, VC-Formal, Yosys, IFV, Questa, etc. - Proficiency in programing/scripting languages - Strong experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator), experience capturing design specification in a temporal assertion language such as SVA - Strong problem solving and debug skills for complex logic and digital designs

Location: Austin, Texas, United States

Salary range: None - None

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